US 11,985,829 B2
Switching element, semiconductor memory device including switching element, and method for fabricating the semiconductor memory device
Dong Uk Lee, Icheon-si (KR); and Hae Chang Yang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Feb. 23, 2021, as Appl. No. 17/183,290.
Claims priority of application No. 10-2020-0025786 (KR), filed on Mar. 2, 2020; and application No. 10-2020-0126547 (KR), filed on Sep. 29, 2020.
Prior Publication US 2021/0272970 A1, Sep. 2, 2021
Int. Cl. H01L 29/00 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H10B 43/35 (2023.01); H10B 51/20 (2023.01)
CPC H10B 43/35 (2023.02) [H01L 29/6684 (2013.01); H01L 29/78391 (2014.09); H10B 51/20 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A switching element comprising:
a first gate dielectric layer formed over a substrate;
a second gate dielectric layer formed over the first gate dielectric layer to overlap a part of the first gate dielectric layer, and including a ferroelectric material;
a second gate electrode formed over the second gate dielectric layer; and
a first gate electrode located between the first and second gate dielectric layers, and configured to control the second gate dielectric layer to selectively have negative capacitance,
wherein the first gate electrode comprises a first region located between the first and second gate dielectric layers and a second region extended from the first region and neighboring a sidewall of the second gate electrode with a gap provided therebetween.