US 11,985,810 B2
Semiconductor device and preparation method thereof, and memory apparatus
Yuejiao Shu, Hefei (CN); and Ming-Pu Tsai, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 8, 2021, as Appl. No. 17/468,793.
Application 17/468,793 is a continuation of application No. PCT/CN2021/103745, filed on Jun. 30, 2021.
Claims priority of application No. 202010969793.3 (CN), filed on Sep. 15, 2020.
Prior Publication US 2022/0085022 A1, Mar. 17, 2022
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/30 (2023.02) [H10B 12/01 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate, wherein a plurality of strip-shaped stacked structures and a sidewall structure covering a periphery of each of the plurality of strip-shaped stacked structures are disposed on the semiconductor substrate, and a conductive structure is disposed on a side of each of the plurality of strip-shaped stacked structures far away from the semiconductor substrate; and
wherein each of the plurality of strip-shaped stacked structures comprises:
a conductor layer, disposed on the semiconductor substrate and configured to transmit a data signal;
an isolation layer, disposed on a side of the conductor layer away from the semiconductor substrate;
a separation layer, disposed on a side of the isolation layer away from the semiconductor substrate and being made of a low dielectric constant material; and
a dielectric layer, disposed on a side of the separation layer away from the semiconductor substrate and configured to isolate the separation layer from the conductive structure.