US 11,985,443 B2
Solid-state image sensor
Tetsuo Gocho, Kanagawa (JP); and Masami Nagata, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/292,276
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Nov. 21, 2019, PCT No. PCT/JP2019/045680
§ 371(c)(1), (2) Date May 7, 2021,
PCT Pub. No. WO2020/105713, PCT Pub. Date May 28, 2020.
Claims priority of application No. 2018-218695 (JP), filed on Nov. 21, 2018; and application No. 2019-116983 (JP), filed on Jun. 25, 2019.
Prior Publication US 2021/0400224 A1, Dec. 23, 2021
Int. Cl. H04N 25/77 (2023.01); H01L 27/146 (2006.01); A61B 1/05 (2006.01); G02B 23/24 (2006.01)
CPC H04N 25/77 (2023.01) [H01L 27/14614 (2013.01); H01L 27/14643 (2013.01); A61B 1/05 (2013.01); G02B 23/2407 (2013.01); H01L 27/14625 (2013.01); H01L 27/1463 (2013.01); H01L 27/14683 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A solid-state image sensor comprising:
a first semiconductor substrate having a photoelectric conversion element; and
a second semiconductor substrate facing the first semiconductor substrate with an insulating film interposed therebetween,
wherein the second semiconductor substrate has an amplification transistor that amplifies an electrical signal output from the photoelectric conversion element on a first main surface, has a region having a resistance lower than a resistance of the second semiconductor substrate on a second main surface opposite to the first main surface, and is grounded via the region,
wherein the second semiconductor substrate has a certain conductive type, and
wherein the region with a lower resistance includes a higher concentration of impurities than other regions of the second semiconductor substrate.