US 11,985,350 B2
Encoder, decoder, encoding method, and decoding method
Chong Soon Lim, Singapore (SG); Han Boon Teo, Singapore (SG); Takahiro Nishi, Nara (JP); Tadamasa Toma, Osaka (JP); Ru Ling Liao, Singapore (SG); Sughosh Pavan Shashidhar, Singapore (SG); and Hai Wei Sun, Singapore (SG)
Assigned to PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA, Torrance, CA (US)
Filed by Panasonic Intellectual Property Corporation of America, Torrance, CA (US)
Filed on Jul. 12, 2021, as Appl. No. 17/373,106.
Application 17/373,106 is a continuation of application No. 16/194,586, filed on Nov. 19, 2018, granted, now 11,134,270.
Application 16/194,586 is a continuation of application No. PCT/JP2017/019113, filed on May 23, 2017.
Claims priority of provisional application 62/342,517, filed on May 27, 2016.
Prior Publication US 2021/0344958 A1, Nov. 4, 2021
Int. Cl. H04N 19/597 (2014.01); G06T 5/80 (2024.01); H04N 5/00 (2011.01); H04N 19/159 (2014.01); H04N 19/176 (2014.01); H04N 19/46 (2014.01); H04N 19/85 (2014.01)
CPC H04N 19/597 (2014.11) [G06T 5/80 (2024.01); H04N 19/159 (2014.11); H04N 19/176 (2014.11); H04N 19/46 (2014.11); H04N 19/85 (2014.11)] 2 Claims
OG exemplary drawing
 
1. An encoder, comprising:
processing circuitry; and
memory connected to the processing circuitry,
wherein, using the memory, the processing circuitry:
encodes a plurality of regions in a first picture;
reconstructs the encoded plurality of regions;
generates a second picture by an arrangement process in which the reconstructed plurality of regions are arranged in a way in which an object within neighboring regions among the reconstructed plurality of regions is continuous; and
stores the second picture in the memory as a reference frame for an inter prediction process.