US 11,985,226 B2
Efficient quantum-attack resistant functional-safe building block for key encapsulation and digital signature
Santosh Ghosh, Hillsboro, OR (US); Marcio Juliato, Portland, OR (US); and Manoj Sastry, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 23, 2020, as Appl. No. 17/133,183.
Prior Publication US 2021/0119777 A1, Apr. 22, 2021
Int. Cl. H04L 9/06 (2006.01); H03M 13/15 (2006.01); H04L 9/00 (2022.01)
CPC H04L 9/0643 (2013.01) [H03M 13/151 (2013.01); H04L 9/002 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
an input register comprising a state register and a parity field;
a first round secure hash algorithm (SHA) datapath comprising a plurality of processing elements communicatively coupled to the state register, comprising:
a first section to perform a θ step of a SHA calculation;
a second section to perform a ρ step and a π step of the SHA calculation;
a third section to perform a χ step of the SHA calculation; and
a fourth section to perform a τ step of the SHA calculation, wherein the first round SHA datapath is to implement a triple time redundancy (TTR) algorithm pursuant to which:
a first group of processing elements is scheduled with a first state bit;
a second group of processing elements is scheduled with a second state bit; and
a third group of processing elements is scheduled with a third state bit.