US 11,985,061 B1
Distributed look-ahead routing in network-on-chip
Krishnan Srinivasan, San Jose, CA (US); Abbas Morshed, Los Altos, CA (US); Aman Gupta, Santa Clara, CA (US); and Sagheer Ahmad, Cupertino, CA (US)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by XILINX, INC., San Jose, CA (US)
Filed on Apr. 9, 2021, as Appl. No. 17/227,258.
Int. Cl. H04L 45/302 (2022.01); G06F 15/78 (2006.01); H04L 45/00 (2022.01); H04L 45/42 (2022.01); H04L 45/745 (2022.01)
CPC H04L 45/302 (2013.01) [G06F 15/7825 (2013.01); H04L 45/42 (2013.01); H04L 45/566 (2013.01); H04L 45/745 (2013.01); H04L 45/34 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a first hardware entity;
a second hardware entity; and
a network on chip (NoC) providing connectivity between the first and second hardware entities, the NoC comprising:
an ingress logic block coupled to the first hardware entity;
an egress logic block coupled to the second hardware entity; and
a plurality of switches coupled between the ingress and egress logic blocks, wherein at least one of the ingress logic block or one of the plurality of switches is configured to:
perform look-ahead routing for a downstream switch located directly after the at least one of the ingress logic block or the one of the plurality of switches by providing a port identification (ID) to the downstream switch to instruct the downstream switch to use a specific port to forward a packet without having the downstream switch itself select the specific port to perform route lookup for the packet.