| CPC H02M 3/33592 (2013.01) [H02M 1/0058 (2021.05); H02M 1/38 (2013.01)] | 11 Claims |
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1. A synchronous rectification control method for a quasi-resonant flyback converter, the flyback converter comprising a primary side of a transformer and a secondary side of the transformer, the primary side comprising a primary winding and a switching transistor, the secondary side comprising a secondary winding, a synchronous rectification transistor and a resonant capacitor, the method comprising:
sampling an output terminal voltage of the switching transistor to obtain a sampled voltage of the switching transistor;
obtaining a dead-time based on the sampled voltage of the switching transistor and a preset relationship, the preset relationship being a correspondence between a duration of the sampled voltage of the switching transistor being below a first preset value during an on-time of the switching cycle and the dead-time, the dead-time being a time from when the switching transistor is turned off to when the synchronous rectification transistor is turned on;
controlling switching of the synchronous rectification transistor based on the dead-time;
outputting a switching transistor control signal to a control terminal of the switching transistor to control turning on and off of the switching transistor, the switching transistor control signal controlling the switching transistor to turn on when a voltage between an input terminal and the output terminal of the switching transistor reaches a valley, the valley of the voltage between the input terminal and the output terminal occurring once or more during one switching cycle of the switching transistor, the first preset value being a voltage value of the sampled voltage of the switching transistor when a primary-side current of the flyback converter is at a first current value, the first current value being the lowest value of the primary-side current during an on-time when the switching transistor is fixedly conducted at the nth valley conduction, the switching transistor turn-on time corresponding to the best efficiency of the flyback converter being between the nth valley and the (n+1)th valley of a current switching cycle, n being an integer greater than 0; and
setting an upper off limit value and a lower off limit value of the sampled voltage of the switching transistor, and controlling the switching transistor to turn off based on the upper off limit value and the lower off limit value to limit the output terminal voltage of the switching transistor when the switching transistor is off, and to control the on time of the switching transistor;
wherein the lower off limit is a voltage value of the sampled voltage of the switching transistor when the primary-side current of the flyback converter is a second current value, the second current value being the lowest value of the primary-side current during an on-time when the switching transistor is fixedly conducted at the (n+1)th valley; the upper off limit is a voltage value of the sampled voltage of the switching transistor when the primary-side current of the flyback converter is a third current value, the third current value being the lowest value of the primary-side current during an on-time when the switching transistor is conducted at the best efficiency of the flyback converter.
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