CPC H01L 25/0652 (2013.01) [H01L 25/50 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01)] | 10 Claims |
1. An apparatus, comprising:
a memory array configured to store data;
a terminal;
an input/output circuit configured to receive data from the memory array and provide read data and receive write data to be stored in the memory array, wherein the input/output circuit is coupled to the terminal and configured to provide the read data to the terminal and configured to receive the write data from the terminal;
a command and address input circuit configured to receive command and address signals;
first and second bond pads; and
a U-shaped conductive structure coupled to the terminal and including a first portion extending between and coupled to the terminal and the first bond pad and further including a second portion extending between and coupled to the terminal and the second bond pad.
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