US 11,984,380 B2
Semiconductor package, semiconductor device, semiconductor package-mounted apparatus, and semiconductor device-mounted apparatus
Masao Kondo, Nagaokakyo (JP); Kenji Sasaki, Nagaokakyo (JP); and Shigeki Koya, Nagaokakyo (JP)
Assigned to Murata Manufacturing Co., Ltd., Kyoto-fu (JP)
Filed by Murata Manufacturing Co., Ltd., Kyoto-fu (JP)
Filed on Jul. 8, 2021, as Appl. No. 17/370,953.
Claims priority of application No. 2020-140366 (JP), filed on Aug. 21, 2020.
Prior Publication US 2022/0059427 A1, Feb. 24, 2022
Int. Cl. H01L 23/367 (2006.01); H01L 23/00 (2006.01); H01L 23/055 (2006.01); H01L 23/31 (2006.01); H01L 23/42 (2006.01); H01L 23/498 (2006.01); H01L 25/18 (2023.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01)
CPC H01L 23/3675 (2013.01) [H01L 23/055 (2013.01); H01L 23/3121 (2013.01); H01L 23/42 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 24/16 (2013.01); H01L 25/18 (2013.01); H05K 1/111 (2013.01); H05K 1/115 (2013.01); H05K 1/181 (2013.01); H01L 2224/16227 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a module substrate having a top surface and a bottom surface facing in opposite directions;
a semiconductor chip provided with a plurality of bumps and mounted on the top surface of the module substrate via the bumps; and
a metal member having a top portion and a side portion, the top portion being disposed at a level higher than the semiconductor chip with reference to the top surface of the module substrate, the top portion including the semiconductor chip in plan view, the side portion extending from the top portion toward the module substrate, wherein
the module substrate includes a first metal film disposed on or in at least one of the bottom surface and an internal layer of the module substrate,
the first metal film is electrically connected to the bumps and reaches a side surface of the module substrate, and
the side portion is thermally coupled to the first metal film at the side surface of the module substrate.