CPC G11C 29/4401 (2013.01) [G11C 29/1201 (2013.01); G11C 29/52 (2013.01); G11C 29/789 (2013.01)] | 18 Claims |
1. A repair system for a semiconductor structure, wherein the semiconductor structure comprises a main memory area and a redundant memory area, and the repair system comprises:
a test circuit, configured to perform defect detection on the main memory area to determine a failed cell of the main memory area and position information of the failed cell;
a control circuit, connected to the test circuit, and configured to store the position information of the failed cell and generate a repair signal according to the position information; and
a repair circuit, connected to the control circuit, and configured to receive the repair signal and perform a repair operation on the failed cell through the redundant memory area;
wherein the repair circuit is further configured to detect a repair state of the failed cell, and the repair state comprises repaired and unrepaired.
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