US 11,984,174 B2
Accelerating configuration updates for memory devices
Tawalin Opastrakoon, Boise, ID (US); Renato C. Padilla, Folsom, CA (US); Vamsi Pavan Rayaprolu, San Jose, CA (US); Sampath K. Ratnam, Boise, ID (US); Michael G. Miller, Boise, ID (US); Gary F. Besinga, San Jose, CA (US); and Christopher M. Smitchger, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Mar. 2, 2021, as Appl. No. 17/249,448.
Prior Publication US 2022/0284974 A1, Sep. 8, 2022
Int. Cl. G11C 16/06 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3468 (2013.01) [G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method comprising:
receiving, by a processing device, a request to perform an adjustment operation on a set of configuration setting values for a memory device, wherein each configuration setting value of the set of configuration setting values is stored in a corresponding configuration register of a set of configuration registers;
determining a configuration adjustment definition associated with one or more configuration setting values of the set of configuration setting values;
calculating, by the processing device, an updated set of configuration setting values by applying a multiplier value to the configuration adjustment definition, wherein the multiplier value is associated with a number of programming operations performed on the memory device; and
storing the updated set of configuration setting values in the corresponding configuration registers.