CPC G11C 11/5635 (2013.01) [G11C 11/4074 (2013.01); G11C 11/5642 (2013.01)] | 19 Claims |
1. A non-volatile memory device comprising:
a memory cell array;
a first pumping circuit configured to output a first pumping voltage;
a second pumping circuit configured to pump the first pumping voltage of the first pumping circuit and output a second pumping voltage; and
a pumping circuit control unit which is connected to the first pumping circuit and the second pumping circuit and configured to cause at least one of the first pumping voltage and the second pumping voltage to be output to the memory cell array,
wherein the first pumping circuit is enabled in a first mode, in a second mode different from the first mode, and in a third mode different from the first and second modes,
wherein the second pumping circuit is not enabled in the first mode, enabled in the second mode, and enabled in the third mode,
wherein in the first mode, the pumping circuit control unit is configured to select and output only the first pumping voltage to the memory cell array,
wherein in the second mode, the pumping circuit control unit is configured to select and output only the second pumping voltage to the memory cell array, and
wherein in the third mode, the pumping circuit control unit is configured to output both the first pumping voltage and the second pumping voltage separately to the memory cell array.
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