a first semiconductor die comprising a plurality of word line conductors arranged in a stack along a first direction away from a substrate of the first semiconductor die, each word line conductor of the plurality of word line conductors extending along a second direction over the substrate and operable to access a respective set of one or more memory cells of the first semiconductor die;

a second semiconductor die comprising a plurality of word line driver circuits, each word line driver circuit of the plurality of word line driver circuits operable to bias a respective word line conductor of the plurality of word line conductors based at least in part on a first word line decoder signal and a respective second word line decoder signal of a plurality of second word line decoder signals; and

a plurality of electrical contacts, each electrical contact of the plurality of electrical contacts coupling a respective word line conductor of the plurality of word line conductors with a respective word line driver circuit of the plurality of word line driver circuits.