US 11,983,791 B2
Unified memory compression mechanism
Sreenivas Kothandaraman, Sammamish, WA (US); Karthik Vaidyanathan, San Francisco, CA (US); Abhishek R. Appu, El Dorado Hills, CA (US); Karol Szerszen, Hillsboro, OR (US); and Prasoonkumar Surti, Folsom, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 14, 2020, as Appl. No. 17/019,479.
Prior Publication US 2022/0084156 A1, Mar. 17, 2022
Int. Cl. G06T 1/20 (2006.01); G06F 9/38 (2018.01); G06F 16/907 (2019.01); G06T 7/90 (2017.01)
CPC G06T 1/20 (2013.01) [G06F 9/3838 (2013.01); G06F 9/3877 (2013.01); G06F 16/907 (2019.01); G06T 7/90 (2017.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus to facilitate compression of memory data, comprising:
one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format to reconcile a quantity of channels supported by the uncompressed data to the quantity of channels supported by the compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, encode the residual data to generate compressed data and packing the compressed data.