US 11,983,621 B2
Integrated circuit chip device
Shaoli Liu, Beijing (CN); Xinkai Song, Beijing (CN); Bingrui Wang, Beijing (CN); Yao Zhang, Beijing (CN); and Shuai Hu, Beijing (CN)
Assigned to CAMBRICON TECHNOLOGIES CORPORATION LIMITED, Beijing (CN)
Filed by Cambricon Technologies Corporation Limited, Beijing (CN)
Filed on Dec. 2, 2022, as Appl. No. 18/073,924.
Application 18/073,924 is a continuation of application No. 16/903,304, filed on Jun. 16, 2020, granted, now 11,544,546.
Application 16/903,304 is a continuation of application No. PCT/CN2018/123929, filed on Dec. 26, 2018.
Claims priority of application No. 201711455388.4 (CN), filed on Dec. 27, 2017; application No. 201711455397.3 (CN), filed on Dec. 27, 2017; application No. 201711466943.3 (CN), filed on Dec. 28, 2017; application No. 201711468629.9 (CN), filed on Dec. 28, 2017; application No. 201711469408.3 (CN), filed on Dec. 28, 2017; application No. 201711469614.4 (CN), filed on Dec. 28, 2017; and application No. 201711469615.9 (CN), filed on Dec. 28, 2017.
Prior Publication US 2023/0095610 A1, Mar. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06N 3/063 (2023.01); G06N 3/04 (2023.01)
CPC G06N 3/063 (2013.01) [G06N 3/04 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A device, comprising:
a main processing circuit; and
a plurality of basic processing circuits, at least a subset of the plurality of basic processing circuits being connected to the main processing circuit,
wherein:
the main processing circuit is configured to:
generate an input data block and a weight data block, at least one of the input data block or the weight data block containing data of a fixed point type;
partition the input data block into a plurality of basic data blocks;
distribute the plurality of basic data blocks to at least one of the subset of the plurality of basic processing circuits connected to the main processing circuit; and
broadcast the weight data block to the subset of the plurality of basic processing circuits connected to the main processing circuit;
the at least one of the subset of the plurality of basic processing circuits is configured to:
perform computations using the weight data block broadcasted to the basic processing circuit and one or more basic data blocks distributed to the basic processing circuit to obtain a computation result; and
transfer the computation result to the main processing circuit; and
the main processing circuit is configured to process the computation result to obtain an instruction result.