| CPC G06F 3/0656 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
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1. A memory controller of a memory system including a memory device and the memory controller, the memory controller comprising:
a buffer memory including memory banks;
one or more host access units configured to perform an access to the buffer memory for a host;
one or more memory access units configured to perform an access to the buffer memory for the memory device; and
a processor configured to control an operation of the memory controller,
wherein the processor is further configured to divide the memory banks into an external memory bank group for an external operation related to the host, and an internal memory bank group for an internal operation within the memory system,
wherein the processor is further configured to change the external memory bank group of the memory banks and the internal memory bank group of the memory banks according to traffic amounts of the internal and external operations,
wherein the host access units are further configured to access the external memory bank group, and
wherein the memory access units are further configured to access the external memory bank group to perform the external operation, and to access the internal memory bank group to perform the internal operation.
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