CPC G06F 1/26 (2013.01) [G06F 3/02 (2013.01); G06F 1/3203 (2013.01)] | 20 Claims |
11. A system, comprising:
a partitionable multi-processor motherboard that supports multiple central processing units, wherein the multi-processor motherboard may be configured as a single unified node or configured as multiple independent partitioned nodes;
a single power button that is accessible to a user, wherein the single power button generates an output signal while being pressed;
an integrated circuit installed on the motherboard and connected to receive the output signal from the power button, wherein the integrated circuit stores a first button press gesture definition associated with selection of a first partitioned node, a second button press gesture definition associated with selection of a second partitioned node, and a third button press gesture definition associated with sequencing power to the selected one of the first or second partitioned nodes;
a first power state device for the first partitioned node connected to the integrated circuit, wherein the integrated circuit sends a first power sequencing signal to the first power state device in response to the output signal received from the single power button indicating that the user has pressed the single power button to sequentially enter a first button press gesture matching the first button press gesture definition followed by a second button press gesture matching the third button press gesture definition, and wherein the first power sequencing signal causes the first power state device to update a stored power state of the first partitioned node and instruct the integrated circuit whether to power on or power off the first partitioned node;
a second power state device for the second partitioned node connected to the integrated circuit, wherein the integrated circuit sends a second power sequencing signal to the second power state device in response to the output signal received from the single power button indicating that the user has pressed the single power button to sequentially enter a first button press gesture matching the first button press gesture definition followed by a second button press gesture matching the third button press gesture definition, and wherein the second power sequencing signal causes the second power state device to update a stored power state of the second partitioned node and instruct the integrated circuit whether to power on or power off the second partitioned node;
a first voltage regulator connected to supply power to components of the first partitioned node, wherein the integrated circuit asserts a power control signal to an enable input of the first voltage regulator in response to the integrated circuit being instructed to power on the first partitioned node and deasserts the power control signal to the enable input of the first voltage regulator in response to the integrated circuit being instructed to power off the first partitioned node; and
a second voltage regulator connected to supply power to components of the second partitioned node, wherein the integrated circuit asserts a power control signal to an enable input of the second voltage regulator in response to the integrated circuit being instructed to power on the second partitioned node and deasserts the power control signal to the enable input of the second voltage regulator in response to the integrated circuit being instructed to power off the second partitioned node.
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