| CPC H10N 70/231 (2023.02) [H10B 63/34 (2023.02); H10N 70/021 (2023.02); H10N 70/063 (2023.02); H10N 70/841 (2023.02); H10N 70/8825 (2023.02); H10N 70/8828 (2023.02); H10N 70/883 (2023.02)] | 20 Claims |

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1. A phase-change memory device, comprising:
a first electrode formed over an interconnect layer;
a phase-change memory element formed over the first electrode;
a second electrode formed over the phase-change memory element; and
an oxygen-free spacer layer formed over sidewalls of the phase-change memory element, wherein the oxygen-free spacer layer directly contacts the sidewalls of the phase-change memory element.
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