| CPC H10F 39/807 (2025.01) [H10F 39/182 (2025.01); H10F 39/8063 (2025.01); H04N 25/745 (2023.01); H04N 25/75 (2023.01); H04N 25/77 (2023.01); H10F 39/8053 (2025.01); H10F 39/813 (2025.01)] | 14 Claims |

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1. A pixel array, comprising:
a plurality of pixel groups, each pixel group comprising:
a plurality of unit pixels respectively including photoelectric conversion elements disposed in a semiconductor substrate;
trench structures disposed in the semiconductor substrate and extending in a vertical direction from a first surface of the semiconductor substrate to a second surface of the semiconductor substrate to electrically and optically separate the photoelectric conversion elements from each other; and
a microlens disposed above or below the semiconductor substrate, the microlens covering all of the photoelectric conversion elements in the plurality of unit pixels to focus an incident light to the photoelectric conversion elements,
wherein the trench structures includes:
an inter-group trench structure separating the pixel group from other pixel groups; and
inter-pixel trench structures separating the plurality of unit pixels included in the pixel group from each other,
wherein the inter-pixel trench structures include:
a first inter-pixel trench structure extending in a first horizontal direction and connected to first and second opposite sides of the inter-group trench structure and extending in the vertical direction from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate; and
a second inter-pixel trench structure extending in a second horizontal direction perpendicular to the first horizontal direction and connected to third and fourth opposite sides of the inter-group trench structure and extending in the vertical direction from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate,
wherein a first portion of the first inter-pixel trench structure at a central region of the pixel group has a first end in contact with the second surface of the semiconductor substrate, extends in the vertical direction from the second surface of the semiconductor substrate to a region in the semiconductor substrate such that a second end of the first portion is spaced away from the first surface of the semiconductor substrate, and a first portion of the second inter-pixel trench structure at the central region of the pixel group extends in the vertical direction from the second surface of the semiconductor substrate to the region in the semiconductor substrate spaced away from the first surface of the semiconductor substrate, and
wherein a second portion of the first inter-pixel trench structure is adjacent to and in contact with the first portion of the first inter-pixel trench structure and has a first end in contact with the second surface of the semiconductor substrate and a second end in contact with the first surface of the semiconductor substrate.
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13. An image sensor, comprising:
a pixel array including a plurality of pixel groups configured to collect photo charges generated by an incident light;
a row driver configured to drive the pixel array row by row; and
a controller configured to control the pixel array and the row driver,
each pixel group comprising:
a plurality of unit pixels respectively including photoelectric conversion elements disposed in a semiconductor substrate;
trench structures disposed in the semiconductor substrate and extending in a vertical direction from an upper surface of the semiconductor substrate to a lower surface of the semiconductor substrate to separate the photoelectric conversion elements from each other; and
a microlens overlapping the semiconductor substrate, the microlens covering all of the photoelectric conversion elements in the plurality of unit pixels,
wherein the trench structures include:
an inter-group trench structure separating the pixel group from other pixel groups;
a first inter-pixel trench structure extending in a first horizontal direction and connected to first and second opposite sides of the inter-group trench structure; and
a second inter-pixel trench structure extending in a second horizontal direction perpendicular to the first horizontal direction and connected to third and fourth opposite sides of the inter-group trench structure,
wherein a first portion of the first inter-pixel trench structure at a central region of the pixel group has a first end in contact with the second surface of the semiconductor substrate, extends in the vertical direction from the second surface of the semiconductor substrate to a region in the semiconductor substrate such that a second end of the first portion opposite to the first end in the vertical direction is spaced away from the first surface of the semiconductor substrate, and a first portion of the second inter-pixel trench structure at the central region of the pixel group extends in the vertical direction from the second surface of the semiconductor substrate to the region in the semiconductor substrate spaced away from the first surface of the semiconductor substrate,
wherein second portions of the first inter-pixel trench structure adjacent to and in contact with the first portion of the first inter-pixel trench structure, extend in the vertical direction from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate, and second portions of the second inter-pixel trench structure at the regions other than the central region of the pixel group extend in the vertical direction from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate, and
wherein first ends of the second portions of the first inter-pixel trench structure are in direct contact with the second surface of the semiconductor substrate and second ends of the second portions of the first inter-pixel trench structure opposite the first ends of the second portions of the first inter-pixel trench structure are in direct contact with the first surface of the semiconductor substrate.
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14. A pixel array, comprising:
a plurality of pixel groups, each pixel group comprising:
a plurality of unit pixels respectively including photoelectric conversion elements disposed in a semiconductor substrate;
trench structures disposed in the semiconductor substrate and extending in a vertical direction from a first surface of the semiconductor substrate to a second surface of the semiconductor substrate to electrically and optically separate the photoelectric conversion elements from each other; and
a microlens disposed above or below the semiconductor substrate, the microlens covering all of the photoelectric conversion elements in the plurality of unit pixels to focus an incident light to the photoelectric conversion elements,
wherein the trench structures includes:
an inter-group trench structure separating the pixel group from other pixel groups;
a first inter-pixel trench structure extending in a first horizontal direction and connected to first and second opposite sides of the inter-group trench structure; and
a second inter-pixel trench structure extending in a second horizontal direction perpendicular to the first horizontal direction and connected to third and fourth opposite sides of the inter-group trench structure,
wherein a first portion of the first inter-pixel trench structure at a central region of the pixel group has a first end in contact with the second surface of the semiconductor substrate, extends in the vertical direction from the second surface of the semiconductor substrate to a region in the semiconductor substrate such that a second end of the first portion opposite to the first end in the vertical direction is spaced away from the first surface of the semiconductor substrate, and a first portion of the second inter-pixel trench structure at the central region of the pixel group extends in the vertical direction from the second surface of the semiconductor substrate to the region in the semiconductor substrate spaced away from the first surface of the semiconductor substrate,
wherein second portions of the first inter-pixel trench structure adjacent to and in contact with the first portion of the first inter-pixel trench structure extend in the vertical direction from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate, and second portions of the second inter-pixel trench structure at the regions other than the central region of the pixel group extend in the vertical direction from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate, and
wherein first ends of the second portions of the first inter-pixel trench structure are in direct contact with the second surface of the semiconductor substrate and second ends of the second portions of the first inter-pixel trench structure opposite the first ends of the second portions of the first inter-pixel trench structure are in direct contact with the first surface of the semiconductor substrate.
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