| CPC H10D 84/853 (2025.01) [H10D 30/0243 (2025.01); H10D 30/6211 (2025.01); H10D 62/115 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |
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1. A method of fabricating a semiconductor device, comprising:
forming a semiconductor fin protruding from on a substrate;
forming a dielectric fin protruding from the substrate, wherein a top surface of the dielectric fin includes a first facet and a second facet;
forming a dummy gate structure over the semiconductor fin and the dielectric fin;
forming a gate isolation structure in the dummy gate structure, the gate isolation structure landing on the top surface of the dielectric fin along an interface, wherein:
a bottom surface of the gate isolation structure includes a third facet and a fourth facet;
the third facet and the first facet point towards one another; and
the fourth facet and the second facet point towards one another; and
forming a gate structure in place of the dummy gate structure, such that the gate isolation structure separates the gate structure.
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