| CPC H10D 84/834 (2025.01) [H01L 21/02164 (2013.01); H10D 30/0243 (2025.01); H10D 30/6211 (2025.01); H10D 62/115 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |

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1. A semiconductor device, comprising:
a substrate;
a pair of semiconductor fins extending upwardly from the substrate;
a dummy fin structure extending upwardly above the substrate and laterally between the pair of semiconductor fins;
a shallow trench isolation (STI) structure laterally surrounding lower portions of the pair of semiconductor fins and the dummy fin structure;
a gate structure extending across the pair of semiconductor fins and the dummy fin structure;
a plurality of source/drain structures above the pair of semiconductor fins and on either side of the gate structure;
a crystalline hard mask layer extending upwardly from the dummy fin structure and having a U-shaped cross section; and
an amorphous hard mask layer in the crystalline hard mask layer, wherein the amorphous hard mask layer having a U-shaped cross section conformal to the U-shaped cross section of the crystalline hard mask layer.
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