US 12,302,618 B2
Gallium nitride (GaN) selective epitaxial windows for integrated circuit technology
Samuel James Bader, Hillsboro, OR (US); Pratik Koirala, Portland, OR (US); Nicole K. Thomas, Portland, OR (US); Han Wui Then, Portland, OR (US); and Marko Radosavljevic, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 26, 2021, as Appl. No. 17/458,097.
Prior Publication US 2023/0062922 A1, Mar. 2, 2023
Int. Cl. H01L 29/267 (2006.01); H01L 21/02 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/82 (2025.01); H10D 64/00 (2025.01)
CPC H10D 62/82 (2025.01) [H01L 21/02381 (2013.01); H01L 21/0243 (2013.01); H01L 21/0254 (2013.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 64/111 (2025.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit structure, comprising:
a substrate comprising silicon, the substrate having a top surface;
a first trench in the substrate, the first trench having a first width and a first height;
a second trench in the substrate, the second trench having a second width and a second height, the second width greater than the first width, and the second height greater than the first height;
a first island in the first trench, the first island comprising gallium and nitrogen and having first corner facets at least partially below the top surface of the substrate, wherein the first island has a bottommost surface and an uppermost surface, the bottommost surface having a lateral width greater than a lateral width of the uppermost surface; and
a second island in the second trench, the second island comprising gallium and nitrogen and having second corner facets at least partially below the top surface of the substrate, wherein the second island has a bottommost surface and an uppermost surface, the bottommost surface having a lateral width greater than a lateral width of the uppermost surface.