US 12,302,603 B2
Semiconductor device and methods of formation
Shahaji B. More, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Apr. 28, 2022, as Appl. No. 17/661,152.
Prior Publication US 2023/0352593 A1, Nov. 2, 2023
Int. Cl. H01L 27/12 (2006.01); H01L 21/02 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 30/6713 (2025.01) [H01L 21/0259 (2013.01); H10D 30/031 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01); H10D 84/0167 (2025.01); H10D 84/017 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a plurality of channel layers over a semiconductor substrate,
wherein the plurality of channel layers are arranged in a direction that is perpendicular to the semiconductor substrate, and
wherein the plurality of channel layers comprise concave-shaped regions at ends of the plurality of channel layers;
a gate structure wrapping around each of the plurality of channel layers;
a source/drain region, adjacent to the plurality of channel layers and the gate structure, comprising convex-shaped portions extending into the concave-shaped regions; and
a seed layer between the concave-shaped regions and the convex-shaped portions.