US 12,302,601 B2
Semiconductor device including transistor including horizontal gate structure and vertical channel layer and method for fabricating the same
Young Gwang Yoon, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Feb. 16, 2024, as Appl. No. 18/443,297.
Application 18/443,297 is a division of application No. 17/481,479, filed on Sep. 22, 2021, granted, now 11,942,544.
Claims priority of application No. 10-2021-0045308 (KR), filed on Apr. 7, 2021.
Prior Publication US 2024/0186410 A1, Jun. 6, 2024
Int. Cl. H10D 30/63 (2025.01); H10D 30/01 (2025.01); H10D 62/17 (2025.01); H10D 64/27 (2025.01)
CPC H10D 30/63 (2025.01) [H10D 30/025 (2025.01); H10D 62/235 (2025.01); H10D 64/514 (2025.01)] 11 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, comprising:
forming a first initial stacked structure including a first lower dielectric layer, a first sacrificial layer, and a first upper dielectric layer that are stacked over a substrate in a vertical direction;
forming a second initial stacked structure including a second lower dielectric layer, a second sacrificial layer, and a second upper dielectric layer that are stacked over the substrate in the vertical direction and having a first side which faces a first side of the first initial stacked structure;
forming a lower electrode layer whose upper surface is positioned at a height equal to or lower than upper surfaces of the first and second lower dielectric layers while filling a lower space between the first initial stacked structure and the second initial stacked structure over the substrate;
forming a first channel layer and a second channel layer having lower ends coupled to the lower electrode layer on the first side of the first initial stacked structure and the first side of the second initial stacked structure, respectively;
forming a first upper electrode layer and a second upper electrode layer respectively coupled to an upper end of the first channel layer and an upper end of the second channel layer; and
replacing the first sacrificial layer and the second sacrificial layer with a first horizontal gate structure and a second horizontal gate structure, respectively,
wherein the first channel layer includes a first impurity of a first conductivity type and the second channel layer includes a second impurity of a second conductivity type, and
wherein the first conductivity type and the second conductivity type are different from each other.