| CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/40 (2023.02)] | 20 Claims |
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1. A semiconductor device, comprising:
a substrate;
a gate electrode structure on the substrate, the gate electrode structure including gate electrodes spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, each of the gate electrodes extending in a second direction parallel to the upper surface of the substrate;
a memory channel structure extending through the gate electrode structure on the substrate, the memory channel structure including:
a channel extending in the first direction;
a charge storage structure surrounding an outer sidewall of the channel;
a first filling pattern filling an inner space formed by the channel; and
a first capping pattern on the channel and the first filling pattern; and
a support structure extending through the gate electrode structure on the substrate, the support structure including:
a second filling pattern extending in the first direction;
a dummy charge storage structure surrounding an outer sidewall of the second filling pattern; and
a second capping pattern on the second filling pattern,
wherein the second capping pattern includes:
an upper portion; and
a lower portion protruding from the upper portion downwardly in the first direction, and
wherein the lower portion of the second capping pattern is disposed between the second filling pattern and the dummy charge storage structure in a horizontal direction substantially parallel to the upper surface of the substrate.
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