| CPC H04N 25/75 (2023.01) [H01L 27/14612 (2013.01); H01L 27/14636 (2013.01); H01L 27/14643 (2013.01); H04N 25/77 (2023.01)] | 20 Claims |
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1. An imaging device, comprising:
a first section including:
a first semiconductor substrate;
a first photoelectric conversion region disposed in the first semiconductor substrate;
a first floating diffusion coupled to the first photoelectric conversion region;
a first bonding portion;
a first wiring electrically connected between the first floating diffusion and the first bonding portion;
a second photoelectric conversion region disposed in the first semiconductor substrate;
a second floating diffusion coupled to the second photoelectric conversion region;
a second bonding portion;
a second wiring electrically connected between the second floating diffusion and the second bonding portion;
a third wiring electrically connected to a fixed voltage and that extends in a same direction as the first and second wirings at a location that is between the first wiring and the second wiring;
a first transfer transistor that transfers charge from the first photoelectric conversion region to the first floating diffusion; and
one or more drive wiring lines electrically connected to the first transfer transistor;
a second section bonded to the first section via the first and second bonding portions and including readout circuitry coupled to the first bonding portion and the second bonding portion;
a third section bonded to the second section and including processing circuitry that processes signals from the readout circuitry; and
a wiring structure that electrically connects the processing circuitry to the one or more drive wiring lines,
wherein, in a cross-sectional view, the one or more drive wiring lines are within a pixel region that includes a plurality of pixels,
wherein the wiring structure comprises:
a first electrode in the first section bonded to a second electrode in the second section; and
wiring that electrically connects the second electrode to the processing circuitry,
wherein the first electrode and the second electrode are outside the pixel region, and
wherein the readout circuitry comprises a first amplification transistor and a first selection transistor.
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