| CPC H04N 23/741 (2023.01) [G06T 3/40 (2013.01); G06T 7/194 (2017.01); G06T 7/60 (2013.01); H04N 23/11 (2023.01); H04N 23/51 (2023.01); H04N 23/56 (2023.01); H04N 23/71 (2023.01); H04N 23/74 (2023.01); H04N 23/957 (2023.01); H04N 25/75 (2023.01); H04N 25/767 (2023.01); H04N 25/772 (2023.01); H01L 27/14681 (2013.01)] | 14 Claims |

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1. A computational pixel imaging apparatus, comprising:
a plurality of pixels, each pixel comprising a detector configured to generate an analog signal when exposed to radiation and a pixel integrated circuit configured to convert the analog signal into at least one digital signal with at least one counter, wherein the pixel integrated circuit comprises a signal converter configured to convert the analog signal to a sequence of pulses, and a first counter configured to, in response to the sequence of pluses, accumulate a first digital number, and wherein the plurality of pixels are configured to:
acquire a plurality of key frames at a first frequency in response to exposure of the detectors of the plurality of pixels for a first-type exposure, wherein when acquiring a key frame of the plurality of key frames, the first counter increments the first digital number for the first-type exposure; and
acquire a plurality of delta frames at a second frequency in response to exposure of the detectors of the plurality of pixels for a second-type exposure, wherein when acquiring a delta frame of the plurality of delta frames, the first counter increments the first digital number for a first portion of the second-type exposure and decrements the first digital number for a second portion of the second-type exposure, and wherein the second frequency is higher than the first frequency.
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