US 12,300,738 B2
Semiconductor device and manufacturing method for the semiconductor device
Chun-Yen Peng, Hsinchu (TW); Te-Yang Lai, Hsinchu (TW); Bo-Feng Young, Taipei (TW); Chih-Yu Chang, New Taipei (TW); Sai-Hooi Yeong, Hsinchu County (TW); and Chi On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Nov. 6, 2023, as Appl. No. 18/502,110.
Application 18/502,110 is a continuation of application No. 17/709,264, filed on Mar. 30, 2022, granted, now 11,848,370.
Application 17/709,264 is a continuation of application No. 16/837,932, filed on Apr. 1, 2020, granted, now 11,309,398, issued on Apr. 19, 2022.
Prior Publication US 2024/0079472 A1, Mar. 7, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/51 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/516 (2013.01) [H01L 21/02356 (2013.01); H01L 21/28185 (2013.01); H01L 29/513 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate; and
a first interfacial layer over the substrate;
a first dielectric layer over the first interfacial layer; and
a first ferroelectric layer over the first interfacial layer and including:
a first portion made of a ferroelectric material in orthorhombic phase;
a second portion made of the ferroelectric material in monoclinic phase; and
a third portion made of the ferroelectric material in tetragonal phase.