US 12,300,721 B2
Semiconductor device structure with channel and method for forming the same
Huang-Siang Lan, Hsinchu (TW); Sathaiya Mahaveer Dhanyakumar, Hsinchu (TW); Tzer-Min Shen, Hsinchu (TW); and Zhiqiang Wu, Chubei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Nov. 2, 2023, as Appl. No. 18/500,225.
Application 18/500,225 is a continuation of application No. 17/217,186, filed on Mar. 30, 2021, granted, now 11,843,032.
Prior Publication US 2024/0063263 A1, Feb. 22, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/06 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/0673 (2013.01) [H01L 27/0924 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a substrate;
a first nanostructure over the substrate, wherein the first nanostructure has a (001) surface, the first nanostructure has a first channel direction on the (001) surface, and the first channel direction is [0 1 0] or [0 −1 0];
a gate stack surrounding the first nanostructure; and
a first source/drain structure and a second source/drain structure over the substrate and over opposite sides of the gate stack, wherein the first nanostructure is between the first source/drain structure and the second source/drain structure, and the first channel direction is from the first source/drain structure to the second source/drain structure.