| CPC H01L 29/0665 (2013.01) [H01L 21/823412 (2013.01); H01L 21/823418 (2013.01); H01L 21/823468 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |

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1. A method comprising:
depositing a multi-layer stack over a semiconductor substrate, the multi-layer stack comprising a plurality of sacrificial layers that alternate with a plurality of channel layers;
forming a first recess in the multi-layer stack;
forming first spacers on sidewalls of the sacrificial layers in the first recess;
depositing a first semiconductor material in the first recess, wherein the first semiconductor material is undoped, wherein the first semiconductor material is in physical contact with a sidewall and a bottom surface of at least one of the first spacers;
implanting dopants in the first semiconductor material, wherein after implanting dopants the first semiconductor material has a gradient-doped profile;
forming an epitaxial source/drain region in the first recess over the first semiconductor material, wherein a material of the epitaxial source/drain region is different from the first semiconductor material;
removing the sacrificial layers to form a second recess; and
forming a gate structure in the second recess.
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