US 12,300,619 B2
Interposer with die to die bridge solution and methods of forming the same
Hsien-Wei Chen, Hsinchu (TW); and Shin-Puu Jeng, Po-Shan Village (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Mar. 10, 2022, as Appl. No. 17/691,261.
Claims priority of provisional application 63/229,962, filed on Aug. 5, 2021.
Prior Publication US 2023/0040467 A1, Feb. 9, 2023
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H10D 1/68 (2025.01); H01L 23/00 (2006.01)
CPC H01L 23/5383 (2013.01) [H01L 21/4857 (2013.01); H01L 23/5384 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H10D 1/68 (2025.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a plurality of inorganic dielectric layers including a plurality of metal interconnect layers formed therein and a plurality of first contact pads, wherein the plurality of inorganic dielectric layers comprises a first inorganic dielectric layer, a second inorganic dielectric layer on the first inorganic dielectric layer and a third inorganic dielectric layer on the second inorganic dielectric layer, the plurality of metal interconnect layers comprises a first metal interconnect layer in the first inorganic dielectric layer, a second metal interconnect layer in the second inorganic dielectric layer, and a third metal interconnect layer in the third inorganic dielectric layer, and the second metal interconnect layer is electrically coupled to a pair of first contact pads of the plurality of first contact pads on opposing sides of the third metal interconnect layer in the third inorganic dielectric layer;
a plurality of organic dielectric layers disposed on and electrically connected to the plurality of inorganic dielectric layers and including a plurality of metal redistribution layers formed therein, wherein the plurality of metal redistribution layers are physically connected to the plurality of first contact pads; and
a semiconductor die mounted on the plurality of organic dielectric layers and electrically connected to the plurality of metal redistribution layers through the plurality of metal interconnect layers.