US 12,299,370 B2
Systems and methods for providing a dynamic high voltage circuit design workflow
Shenggao Li, Cupertino, CA (US); Szu-Chun Tsao, Hsinchu (TW); and Wen-Shen Chou, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 8, 2022, as Appl. No. 17/688,966.
Claims priority of provisional application 63/224,894, filed on Jul. 23, 2021.
Prior Publication US 2023/0023317 A1, Jan. 26, 2023
Int. Cl. G06F 30/392 (2020.01); G06F 30/3308 (2020.01); G06F 30/337 (2020.01); G06F 30/367 (2020.01); G06F 30/373 (2020.01); G06F 30/398 (2020.01); G06F 119/06 (2020.01)
CPC G06F 30/392 (2020.01) [G06F 30/398 (2020.01); G06F 30/3308 (2020.01); G06F 30/337 (2020.01); G06F 30/367 (2020.01); G06F 30/373 (2020.01); G06F 2119/06 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method for designing an integrated circuit device, comprising:
receiving a schematic diagram of the integrated circuit device;
generating, by a simulation program, a first transient simulation of the integrated circuit device based on the schematic diagram;
determining from the first transient simulation of the integrated circuit device a plurality of maximum voltage change values between conductor networks within the schematic diagram of the integrated circuit device;
storing the plurality of maximum voltage change values for the schematic diagram of the integrated circuit device in a computer readable medium, wherein a first maximum voltage change value of the plurality of maximum voltage change value includes a difference between a maximum voltage value at a first node and a maximum voltage value at a second node; and
utilizing, by a layout program, the stored plurality of maximum voltage change values to generate a layout design for the integrated circuit device according to one or more high voltage design constraints.