US 12,299,323 B2
Memory controller and memory system performing wear-leveling
Hua Tan, Wuhan (CN); Xing Wang, Wuhan (CN); Yaolong Gao, Wuhan (CN); Fanya Bi, Wuhan (CN); Zhe Sun, Wuhan (CN); and Bo Yu, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on May 18, 2023, as Appl. No. 18/199,246.
Application 18/199,246 is a continuation of application No. PCT/CN2023/091251, filed on Apr. 27, 2023.
Prior Publication US 2024/0361955 A1, Oct. 31, 2024
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01)
CPC G06F 3/0658 (2013.01) [G06F 3/0614 (2013.01); G06F 3/0679 (2013.01); G06F 12/0238 (2013.01); G06F 2212/7211 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory system, comprising
a volatile memory device;
a non-volatile memory device comprising a plurality of memory groups, each of the memory groups comprising a plurality of memory units; and
a memory controller coupled to the non-volatile memory device and configured to monitor a group write count for each memory group of the non-volatile memory device and store a group write counts into the volatile memory device, and further configured to perform at least one of:
a first wear-leveling process by swapping a first memory group of the memory groups and a second memory group of the memory groups based on a first group write count for the first memory group and a second group write count for the second memory group, wherein the first group write count of the group write counts for the first memory group is a maximal group write count of the group write counts; or
a second wear-leveling process by swapping a first memory unit of the memory units and a second memory unit of the memory units based on a first unit write count for the first memory unit and a second unit write count for the second memory unit, wherein the second group write count of the group write counts for the second memory group is a minimal group write count of the group write counts.