| CPC G06F 12/1408 (2013.01) [G06F 12/0835 (2013.01); G06F 12/1458 (2013.01)] | 20 Claims | 

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               1. An apparatus, comprising: 
            a semiconductor device package including a processing circuitry and an on-chip memory device; and 
                an off-chip data storage device including master data and computer-readable instructions stored thereon, the master data including a digital signature and a hash table, the digital signature for verifying the master data, the hash table including respective hash information for respective portions of the computer-readable instructions; 
                wherein the processing circuitry to: 
              retrieve the master data from the off-chip data storage device; 
                  verify the master data responsive to the digital signature; 
                  retrieve a portion of the computer-readable instructions from the off-chip data storage device; 
                  calculate a hash value of the retrieved portion of the computer-readable instructions; 
                  determine whether the calculated hash value correlates to the respective hash information of the hash table of the master data for the respective retrieved portion of the computer-readable instructions; 
                  execute the retrieved portion of the computer-readable instructions on the on-chip memory device responsive to a determination that the calculated hash value correlates to the respective hash information of the hash table; and 
                  do not execute the retrieved portion of the computer-readable instructions on the on-chip memory device responsive to a determination that the calculated hash value does not correlate to the respective hash information of the hash table. 
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