US 12,298,904 B2
Random seed generating circuit of memory system
Chol Su Chae, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jun. 4, 2021, as Appl. No. 17/339,433.
Claims priority of application No. 10-2020-0182543 (KR), filed on Dec. 23, 2020.
Prior Publication US 2022/0197792 A1, Jun. 23, 2022
Int. Cl. G06F 12/06 (2006.01); G06F 7/58 (2006.01)
CPC G06F 12/0646 (2013.01) [G06F 7/588 (2013.01); G06F 2212/1056 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A random seed generating circuit of a memory system, the random seed generating circuit comprising:
a first address generating circuit configured to generate an initial address based on target page information;
a second address generating circuit configured to generate a plurality of table addresses based on the target page information and a plurality of partial addresses, which are divided from the initial address;
a table circuit configured to output, from a plurality of tables, a plurality of table values respectively corresponding to the plurality of table addresses; and
a seed generating circuit configured to generate a random seed based on the plurality of table values.