| CPC G06F 12/0292 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0619 (2013.01); G06F 3/0631 (2013.01); G06F 3/064 (2013.01); G06F 3/0647 (2013.01); G06F 3/0652 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 11/1068 (2013.01); G06F 11/1451 (2013.01); G06F 12/023 (2013.01); G06F 2212/1016 (2013.01)] | 20 Claims |
|
1. A storage device comprising:
a nonvolatile memory device including a plurality of memory cells; and
a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells,
wherein, based on receiving an open zone command from an external host device, the controller is further configured to:
based on a number of free erase units from among a plurality of erase units included in the plurality of memory cells being greater than a threshold value, allocate at least two free erase units from among the free erase units to a first-type zone, and
based on the number of the free erase units being smaller than or equal to the threshold value, allocate the at least two free erase units to a second-type zone,
wherein a number of bits per memory cell of the first-type zone is smaller than a number of bits per memory cell of the second-type zone,
wherein the controller is further configured to permit a random write based on a random logical address received from the external host device for the first-type zone, and
wherein the controller is further configured to permit a zone write based on a sequential logical address received from the external host device for the second-type zone.
|