US 12,298,901 B2
Apparatus and method with register sharing
Won Woo Ro, Seoul (KR); Seunghyun Jin, Seoul (KR); Jonghyun Lee, Seoul (KR); and Hyunwuk Lee, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR); and Industry—Academic Cooperation Foundation, Yonsei University, Seoul (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR); and Industry—Academic Cooperation Foundation, Yonsei University, Seoul (KR)
Filed on May 11, 2023, as Appl. No. 18/315,576.
Claims priority of application No. 10-2022-0074653 (KR), filed on Jun. 20, 2022.
Prior Publication US 2023/0409474 A1, Dec. 21, 2023
Int. Cl. G06F 12/02 (2006.01); G06F 12/0875 (2016.01)
CPC G06F 12/0284 (2013.01) [G06F 12/0875 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of operating a processing apparatus, the method comprising:
determining whether there is shared data that is used by each of threads in a plurality of concurrently executing threads sharing a shared memory to operate on data therein, based on an instruction that has been decoded;
based on determining that there is shared data that is used by each of the threads in the plurality of threads, determining whether a memory address of the shared memory storing the shared data corresponding to each of the threads in the plurality of threads is stored in an address-to-register mapping table that maps memory addresses of the shared memory to identifiers of shared registers shared by the threads in the plurality of threads;
based on a result of the determining whether the memory address is stored in the address-to-register mapping table, adding, to the address-to-register mapping table, a mapping of the memory address of the shared data to an identifier of a shared register for storing the shared data; and
loading the shared data based on the identifier of the shared register.