CPC H10K 59/126 (2023.02) [H10K 59/131 (2023.02); H10K 59/65 (2023.02)] | 17 Claims |
1. A display panel comprising:
a substrate;
a first barrier layer disposed on the substrate;
a shielding pattern disposed on the first barrier layer and having a mesh shape;
a second barrier layer covering the shielding pattern and disposed on the first barrier layer;
a first active pattern disposed on the second barrier layer and overlapping the shielding pattern in a plan view;
a gate electrode disposed on the first active pattern;
an emission control line disposed on the first active pattern and adjacent to one side of the gate electrode in a plan view;
a second active pattern disposed on the emission control line; and
an upper compensation control line disposed on the second active pattern and adjacent to the other side of the gate electrode in a plan view,
wherein the shielding pattern comprises a first pattern and a second pattern, the first pattern and the second pattern are disposed on a same layer as the shielding pattern, and
wherein each of the first pattern and the second pattern comprises a first portion overlapping the gate electrode in a plan view and a second portion having a width narrower than a width of the first portion in a first direction.
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