CPC H10K 59/1216 (2023.02) [G09G 3/3233 (2013.01); H10K 59/131 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/043 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2320/0223 (2013.01)] | 19 Claims |
1. A display substrate, comprising:
a base substrate;
a pixel circuit array distributed in a plurality of columns in a first direction and a plurality of rows in a second direction;
a plurality of first power lines extended along the first direction, a second power line extended along the second direction and on a side of the plurality of first power lines away from the base substrate, wherein the plurality of first power lines are connected with the pixel circuit array to provide a first power voltage;
a plurality of third power lines which are extended along the first direction and are electrically connected with the plurality of first power lines in one-to-one correspondence respectively,
wherein each of the plurality of third power lines is at least partially overlapped with a first power line corresponding to the each third power line in a direction perpendicular to the base substrate; and
the plurality of third power lines and the second power line are in a same layer and are of an integral structure;
the display substrate further comprises a first connection electrode,
wherein the first connection electrode is configured to be electrically connected with a pixel electrode of a light emitting element through a first via hole; and
the first connection electrode is in a same layer and made of a same material as the second power line.
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