| CPC H10K 59/121 (2023.02) [H10K 50/865 (2023.02); H10K 59/1213 (2023.02); H10K 59/131 (2023.02); H10K 59/65 (2023.02); H10K 2102/102 (2023.02); H10K 2102/103 (2023.02)] | 20 Claims |

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1. A display panel, comprising:
a first display region and a second display region, wherein the first display region is disposed around at least part of the second display region, and the second display region comprises a transparent display region and a transition display region;
a substrate;
a driver circuit layer, which is located on the substrate; and
a plurality of light-emitting units, which is located on a side of the driver circuit layer away from the substrate and is disposed in the first display region, the transparent display region and the transition display region;
an electrode trace, wherein a lower electrode is electrically connected to a pixel circuit among the plurality of pixel circuits located in the transition display region through the electrode trace, the lower electrode is disposed on a side of the light-emitting units of the transparent display region close to the substrate, and the pixel circuit corresponds to the lower electrode, the driver circuit layer comprises:
a plurality of pixel circuits being in a one-to-one correspondence with the plurality of light-emitting units, the plurality of pixel circuits comprises:
a plurality of drive transistors, wherein pixel circuits corresponding to light-emitting units of the transparent display region and the transition display region are located in the transition display region, the drive transistors comprise:
a first drive transistor located in the transition display region, a gate of the first drive transistor is configured to transmit a first gate signal, the driver circuit layer comprises:
a plurality of gate transmission structures configured to transmit the first gate signal, along a direction perpendicular to the substrate, an overlapping region is located between the gate transmission structures and a lower electrode disposed on a side, close to the substrate, of a light-emitting unit of the transition display region located above the respective gate transmission structure, a shielding layer is disposed between the lower electrode and the driver circuit layer, configured to connect to a fixed potential disposed in at least part of the overlapping region to shield from parasitic capacitance between the lower electrode and the gate transmission structure, and located in a same layer as the electrode trace.
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