US 12,295,171 B2
Display device
Pang-Ho Jai, Suzhou (CN); Hung-Che Cheng, Suzhou (CN); and Wen-Chieh Chou, Suzhou (CN)
Assigned to AU OPTRONICS (KUNSHAN) CO., LTD., Kunshan (CN)
Appl. No. 17/433,708
Filed by AU Optronics (Kunshan) Co., Ltd., Kunshan (CN)
PCT Filed May 25, 2020, PCT No. PCT/CN2020/092070
§ 371(c)(1), (2) Date Aug. 25, 2021,
PCT Pub. No. WO2021/184538, PCT Pub. Date Sep. 23, 2021.
Claims priority of application No. 202010179319.0 (CN), filed on Mar. 19, 2020.
Prior Publication US 2024/0213254 A1, Jun. 27, 2024
Int. Cl. G02F 1/1345 (2006.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01); H10H 29/14 (2025.01)
CPC H10D 86/60 (2025.01) [H10D 86/411 (2025.01); H10D 86/441 (2025.01); H10H 29/142 (2025.01)] 19 Claims
OG exemplary drawing
 
1. A display device, comprising:
a first substrate having a peripheral region and a display region adjacent to each other, a plurality of pixel units disposed in the display region, arranged into multiple columns along a first direction, and arranged into multiple rows along a second direction, each of the pixel units having a thin film transistor;
a second metal layer disposed on the first substrate, and electrically connected to the plurality of pixel units, respectively;
a first planarization layer disposed on the first substrate, and covering the second metal layer, wherein the first planarization layer includes a plurality of bump pad groups, each having a plurality of bump pads, and a plurality of opening regions formed between adjacent of the plurality of bump pad groups;
a third metal layer disposed in the peripheral region, having a position corresponding to the plurality of opening regions, and electrically connected to the second metal layer;
a second substrate opposite to the first substrate;
a light shielding layer disposed on the second substrate;
a first color resist layer disposed on the light shielding layer;
a second planarization layer disposed on the second substrate, and covering the first color resist layer; and
a second color resist layer disposed on the second substrate;
wherein in the display region, the second color resist layer is adjacent to the first color resist layer, and in the peripheral region, the second color resist layer and the first color resist layer are stacked, and a position of the second color resist layer corresponds to the plurality of opening regions of the first planarization layer.