US 12,295,143 B2
Methods for forming multilayer horizontal NOR-type thin-film memory strings
Scott Brad Herner, Portland, OR (US); Wu-Yi Henry Chien, San Jose, CA (US); Jie Zhou, San Jose, CA (US); and Eli Harari, Saratoga, CA (US)
Assigned to SUNRISE MEMORY CORPORATION, San Jose, CA (US)
Filed by SUNRISE MEMORY CORPORATION, San Jose, CA (US)
Filed on Jun. 28, 2022, as Appl. No. 17/809,535.
Application 17/809,535 is a division of application No. 16/703,663, filed on Dec. 4, 2019, granted, now 11,404,431.
Claims priority of provisional application 62/775,310, filed on Dec. 4, 2018.
Prior Publication US 2022/0328518 A1, Oct. 13, 2022
Int. Cl. H01L 27/11582 (2017.01); H01L 21/308 (2006.01); H01L 29/66 (2006.01); H10B 43/27 (2023.01); H10D 30/01 (2025.01)
CPC H10B 43/27 (2023.02) [H01L 21/308 (2013.01); H10D 30/0413 (2025.01)] 16 Claims
OG exemplary drawing
 
1. A method for high aspect ratio etching for a memory structure to be formed above a planar surface of a semiconductor substrate, comprising:
preparing a plurality of active layers (“multilayers”) over the planar surface, stacked one on top of another along a first direction substantially orthogonal to the planar surface, wherein each multi-layer comprising first and second layers of a first conductive material;
providing a plurality of dielectric pillars extending along the first direction through the multilayers; and
patterning and etching the multilayers along the first direction using a mask to create a set of trenches that divide the multi-layers into a group of multi-layer stacks, wherein each trench extends along a second direction substantially parallel to the surface of the substrate and wherein each dielectric pillar abuts two neighboring multi-layer stacks.