| CPC H10B 41/27 (2023.02) [H10B 41/35 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] | 14 Claims |

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1. A method used in forming a memory array comprising strings of memory cells, comprising:
forming a stack comprising vertically-alternating first tiers and second tiers, the stack comprising laterally-spaced memory-block regions and a through-array-via (TAV) region, the stack comprising channel-material strings extending through the first tiers and the second tiers in the memory-block regions, the stack comprising TAV openings in the TAV region;
forming a radially-outer insulative lining in individual of the TAV openings, the radially-outer insulative lining comprising a radially-inner insulative material extending elevationally along the first tiers and the second tiers and comprising a radially-outer insulative material, the radially-inner insulative material and the radially-outer insulative material being of different compositions relative one another;
forming a conductive core in the individual TAV openings elevationally along the vertically-alternating first tiers and second tiers radially-inward of the insulative lining to form a TAV in the individual TAV openings;
the radially-inner insulative material and the radially-outer insulative material at least predominantly comprise SiO2, the radially-inner insulative material comprises a dopant; and
the radially-outer insulative material has less, if any, of the dopant than the radially-inner insulative material, the dopant comprising at least one of boron, nitrogen, gallium, and metal material.
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