US 12,295,137 B2
Method of manufacturing tsemiconductor device having bonding structure
Yi-Jen Lo, New Taipei (TW); Chiang-Lin Shih, New Taipei (TW); and Hsih-Yang Chiu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Jun. 26, 2023, as Appl. No. 18/213,977.
Application 18/213,977 is a division of application No. 17/896,933, filed on Aug. 26, 2022.
Prior Publication US 2024/0074147 A1, Feb. 29, 2024
Int. Cl. H10B 12/00 (2023.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01)
CPC H10B 12/315 (2023.02) [H01L 23/5283 (2013.01); H01L 23/53295 (2013.01); H10B 12/0335 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02)] 13 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
providing a first substrate;
forming a first dielectric layer on the first substrate; providing a second substrate, the second substrate comprising a metallization layer over the second substrate; forming a second dielectric layer over the metallization layer;
bonding the first dielectric layer and the second dielectric layer to form a bonding structure between the first substrate and the second substrate;
patterning the second substrate to form a stackstructure over the bonding structure; patterning the metallization layer to form a bit line over the bonding structure; and
forming a word line on a lateral surface of the stack structure; wherein a conductive feature is formed on the first substrate, and the first dielectric layer is formed on the conductive feature, and wherein the conductive feature is spaced apart from the bit line by the bonding structure.