| CPC H04N 25/65 (2023.01) [H04N 25/77 (2023.01); H04N 25/78 (2023.01); H10F 39/80373 (2025.01); H10F 39/80377 (2025.01)] | 20 Claims |
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1. A solid-state imaging device comprising:
a pixel part having pixels arranged therein, each pixel including a photoelectric conversion element, each pixel being configured to produce, as a readable pixel signal, a read-out reset signal and a read-out signal with at least two conversion gains, the read-out reset signal corresponding to a reset state and the read-out signal being determined by charges stored in the photoelectric conversion element;
a noise reducing part configured to perform noise reduction on each pixel at least during a reset period; and
a reading part configured to read the pixel signal from the pixel part while controlling the noise reduction performed by the noise reducing part,
wherein each pixel has:
the photoelectric conversion element configured to store therein, in an exposure period, charges corresponding to an amount of incident light;
a floating diffusion configured to hold charges transferred thereto so that the charges are read out as a voltage signal, the floating diffusion being configured to convert the charges into voltage determined by a capacitance;
a reset element configured to perform a reset operation of discharging, into a reset potential, the charges stored at least in the floating diffusion; and
a storage capacitance element configured to be connected to or disconnected from the floating diffusion according to a conversion gain,
wherein the reset element has:
a first terminal connected to a first reset line connected to the reset potential; and
a second terminal connected to a second reset line connected to at least one of the floating diffusion or the storage capacitance element, the floating diffusion being a target to be reset,
wherein, if a control signal of a predetermined level is applied to the reset element in a reset period, electrical conduction is maintained between the first and second terminals,
wherein, at least in a reset period during a read-out operation with at least one of the two conversion gains, the noise reducing part:
keeps connection between the first reset line and the reset potential during a predetermined first period after the reset period starts;
keeps the first reset line in a floating state in a second period after the first period elapses, so that the first reset line has high impedance,
wherein the reading part:
keeps the reset element in a conduction state for a predetermined period of time from a start of the reset period; and
switches the reset element into a non-conduction state after the first and second periods elapse and when the reset period ends,
wherein the reset element of each pixel is formed by a first reset transistor configured to be switched between a conduction state and a non-conduction state in response to a first reset control signal, and
wherein the noise reducing part includes:
a second reset transistor connected between the first reset line and the reset potential, the second reset transistor being configured to be switched between a conduction state and a non-conduction state in response to a second reset control signal; and
a reset control capacitance element connected to the first reset line.
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