US 12,294,474 B2
Signaling compression and decompression associated with a partially unrolled decision feedback equalizer (DFE)
Ehud Nir, Etobicoke (CA)
Assigned to Cadence Design Systems, Inc., San Jose, CA (US)
Filed by Cadence Design Systems, Inc., San Jose, CA (US)
Filed on May 3, 2023, as Appl. No. 18/142,977.
Claims priority of provisional application 63/339,387, filed on May 6, 2022.
Prior Publication US 2023/0362041 A1, Nov. 9, 2023
Int. Cl. H04L 25/03 (2006.01); H04L 27/06 (2006.01); H04L 25/49 (2006.01)
CPC H04L 25/03057 (2013.01) [H04L 27/06 (2013.01); H04L 25/4917 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A receiver comprising:
a sampling circuit configured to generate a plurality of samples of an incoming signal modulated according to a pulse-amplitude modulation (PAM) scheme; and
a digital processing circuit coupled to the sampling circuit, wherein the digital processing circuit comprises:
a partially unrolled decision feedback equalizer (DFE), wherein the partially unrolled DFE comprises a first multiplexers having two 1-bit inputs and one 1-bit output and a second multiplexer coupled to the first multiplexer, wherein the partially unrolled DFE is configured to determine a 1-bit output value; and
decompression circuitry configured to determine a PAM level region in which an actual symbol is located and transform the 1-bit output value into a multi-bit output value by adding a pointer value associated with the PAM level region within the PAM scheme.