US 12,294,447 B2
System and method for handling stacked channels
Glenn Chang, Carlsbad, CA (US); Brian Sprague, Irvine, CA (US); and Madhukar Reddy, Carlsbad, CA (US)
Assigned to Entropic Communications, LLC, Plano, TX (US)
Filed by Entropic Communications, LLC, New York, NY (US)
Filed on Feb. 17, 2022, as Appl. No. 17/674,201.
Application 17/674,201 is a continuation of application No. 17/402,789, filed on Aug. 16, 2021, abandoned.
Application 17/402,789 is a continuation of application No. 16/259,021, filed on Jan. 28, 2019, granted, now 11,121,789, issued on Sep. 14, 2021.
Application 16/259,021 is a continuation of application No. 14/316,194, filed on Jun. 26, 2014, granted, now 10,193,645, issued on Jan. 29, 2019.
Application 14/316,194 is a continuation of application No. 13/762,939, filed on Feb. 8, 2013, granted, now 8,799,964, issued on Aug. 5, 2014.
Claims priority of provisional application 61/620,746, filed on Apr. 5, 2012.
Claims priority of provisional application 61/596,291, filed on Feb. 8, 2012.
Prior Publication US 2022/0173822 A1, Jun. 2, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04H 40/90 (2008.01); H04H 20/63 (2008.01); H04N 7/10 (2006.01); H04N 7/22 (2006.01); H04N 21/40 (2011.01); H04N 21/41 (2011.01); H04N 21/426 (2011.01); H04N 21/436 (2011.01); H04N 21/45 (2011.01); H04N 21/60 (2011.01); H04N 21/61 (2011.01); H04N 21/63 (2011.01); H04N 21/633 (2011.01); H04N 21/6332 (2011.01); H04N 21/637 (2011.01); H04N 21/6377 (2011.01); H04N 21/64 (2011.01); H04N 21/6402 (2011.01); H04N 21/6405 (2011.01); H04N 21/6408 (2011.01); H04N 21/647 (2011.01)
CPC H04H 40/90 (2013.01) [H04H 20/63 (2013.01); H04N 7/106 (2013.01); H04N 7/22 (2013.01); H04N 21/40 (2013.01); H04N 21/41 (2013.01); H04N 21/4108 (2013.01); H04N 21/42684 (2013.01); H04N 21/43615 (2013.01); H04N 21/45 (2013.01); H04N 21/60 (2013.01); H04N 21/61 (2013.01); H04N 21/63 (2013.01); H04N 21/633 (2013.01); H04N 21/6332 (2013.01); H04N 21/637 (2013.01); H04N 21/6377 (2013.01); H04N 21/64 (2013.01); H04N 21/6402 (2013.01); H04N 21/6405 (2013.01); H04N 21/6408 (2013.01); H04N 21/647 (2013.01); H04N 21/64746 (2013.01); H04N 21/64753 (2013.01); H04N 21/64761 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A system, comprising:
a gateway, and
a satellite reception assembly configured to communicate with the gateway via a single link which forms existing connectivity between the satellite reception assembly and the gateway;
wherein the gateway is configured to deliver requested content to a client device of a plurality of client devices via a network and generate an output signal according to the requested content for the client device,
wherein the satellite reception assembly is configured to frequency stack a plurality of satellite signals to obtain stacked content through channel stacking or band stacking and equalize the stacked content; and
wherein the satellite reception assembly comprises:
a plurality of input mixers, each of the plurality of input mixers being configured to process a component of a satellite signal;
a plurality of first filters configured to respectively process a plurality of first mixer output signals of the plurality of input mixers;
a plurality of analog-to-digital convertors (ADCs) configured to respectively process a plurality of first filter output signals of the plurality of first filters;
a digital front end (DFE) providing crossbar combining/switching configured to map a plurality of ADC output signals of the plurality ADCs to a plurality of DFE output signals, a number of the plurality of DFE output signals being less than a number of the plurality of ADC output signals;
a plurality of digital-to-analog convertors (DACs) configured to respectively process the plurality of DFE output signals;
a plurality of second filters configured to respectively process a plurality of DAC output signals of the plurality of DACs;
a plurality of output mixers configured to process a plurality of second filter output signals of the plurality of second filters; and
a plurality of adders configured to process a plurality of second mixer output signals of the plurality of output mixers to output a number of adder output signals, a number of the adder output signals being less than a number of the plurality of second mixer output signals.