US 12,294,391 B2
Encoding device, encoding method, decoding device, decoding method, and program
Masayuki Unuma, Kanagawa (JP); Hiroshi Shiroshita, Kanagawa (JP); Daisuke Okazawa, Kanagawa (JP); and Aritoshi Kimura, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 18/009,527
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Jun. 16, 2021, PCT No. PCT/JP2021/022799
§ 371(c)(1), (2) Date Dec. 9, 2022,
PCT Pub. No. WO2022/004376, PCT Pub. Date Jan. 6, 2022.
Claims priority of application No. 2020-112712 (JP), filed on Jun. 30, 2020.
Prior Publication US 2023/0223953 A1, Jul. 13, 2023
Int. Cl. H03M 7/30 (2006.01); G06F 11/08 (2006.01); H03M 5/14 (2006.01); H03M 7/14 (2006.01); H03M 13/00 (2006.01); H03M 13/19 (2006.01); H03M 13/31 (2006.01); H04L 1/00 (2006.01); H04L 25/49 (2006.01); H04N 23/60 (2023.01)
CPC H03M 7/6011 (2013.01) [G06F 11/08 (2013.01); H03M 5/145 (2013.01); H03M 7/14 (2013.01); H03M 7/6005 (2013.01); H03M 13/19 (2013.01); H03M 13/31 (2013.01); H03M 13/63 (2013.01); H04L 1/0057 (2013.01); H04L 1/0061 (2013.01); H04L 25/4908 (2013.01); H04N 23/665 (2023.01)] 20 Claims
OG exemplary drawing
 
1. An encoding device comprising:
a memory storing instructions, and
at least one processor configured to execute the instructions to perform operations comprising:
scrambling an input data string to produce a scrambled data string;
calculating a first running disparity of the scrambled data string;
determining whether or not to invert the scrambled data string on a basis of the first running disparity and a second running disparity calculated at a time point before the first running disparity;
determining a flag in association with the input data string;
calculating a parity code using the flag; and
adding the parity code at an end of a block that includes the scrambled data string.