US 12,294,389 B2
Semiconductor device
Young Hyun Yoon, Gwangmyeong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 30, 2022, as Appl. No. 18/148,604.
Claims priority of application No. 10-2022-0007881 (KR), filed on Jan. 19, 2022; and application No. 10-2022-0057004 (KR), filed on May 10, 2022.
Prior Publication US 2023/0231572 A1, Jul. 20, 2023
Int. Cl. H03M 1/00 (2006.01); H03K 19/20 (2006.01); H03M 3/00 (2006.01)
CPC H03M 3/502 (2013.01) [H03K 19/20 (2013.01); H03M 3/422 (2013.01); H03M 3/464 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an integrator configured to receive a first input signal through a first input terminal and output a corresponding first output signal, and to receive a second input signal through a second input terminal and output a corresponding second output signal;
a quantizer configured to generate a first digital signal based on the first and second output signals;
a first switch configured to control application of a first reference voltage to a first resistor based on a first control signal;
a second switch configured to control application of a second reference voltage to the first resistor based on a second control signal; and
a third switch configured to control connection between the first resistor and the first input terminal based on a third control signal,
wherein,
the first through third control signals are generated based on the first digital signal and a second digital signal obtained by delaying the first digital signal,
the third switch is turned on when any one of the first and second switches is turned on, and
the third switch is turned off when both the first and second switches are turned off.