US 12,294,388 B2
Continuous-time delta-sigma analog-to-digital converter and operation method thereof
Jung Hyup Lee, Daegu (KR); Ji Woong Choi, Seoul (KR); and Se Hwan Lee, Chilgok-gun (KR)
Assigned to DAEGU GYEONGBUK INSTITUTE OF SCIENCE AND TECHNOLOGY, Daegu (KR)
Filed by Daegu Gyeongbuk Institute of Science and Technology, Daegu (KR)
Filed on Feb. 14, 2023, as Appl. No. 18/168,882.
Claims priority of application No. 10-2022-0019670 (KR), filed on Feb. 15, 2022; and application No. 10-2022-0176611 (KR), filed on Dec. 16, 2022.
Prior Publication US 2023/0261671 A1, Aug. 17, 2023
Int. Cl. H03M 1/00 (2006.01); H03M 3/00 (2006.01)
CPC H03M 3/484 (2013.01) 10 Claims
OG exemplary drawing
 
1. A continuous-time delta-sigma analog-to-digital converter, comprising:
a linear integrator configured to generate a first output signal corresponding to a preset input voltage based on an operation of a linear Gm circuit that receives the preset input voltage; and
a quantizer configured to generate a second output signal corresponding to the first output signal based on an operation of a body-driven VCO that receives the first output signal and to generate a digital output code corresponding to the second output signal based on an operation of a Frequency to Digital Converter (FDC) that receives the second output signal,
wherein the continuous-time delta-sigma analog-to-digital converter operates based on an input impedance determined by chopping frequency (fCH) at a node connected to an input terminal of the linear integrator and an input capacitor (CIN) provided between the input terminal of the linear integrator and a ground line.